Reciva NAND Flash: Difference between revisions

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== Bad Block Management ==
== Bad Block Management ==


Each partition starts at the pre-defined offset of 0000000, 0004000 0100000 0E00000 or 0F00000.  The NAND Flash comes from the factory with bad blocks marked (the sixth byte in the extra information of the first of the 32 pages in the 16K block is non-FF).  When writing to the partition, the bad blocks are simply skipped.
Each partition starts at the pre-defined offset of 0000000, 0004000 0100000 0E00000 or 0F00000.  The NAND Flash comes from the factory with bad blocks marked (the sixth byte in the extra information of the first two of the 32 pages in the 16K block is non-FF).  When writing to the partition, the bad blocks are simply skipped.
 
Note that the kernel source, nandflash and every program I have seen so far, that deals with NAND flash makes the assumption that byte 5 on the first page indicates a bad block.  The datasheet for the NAND device says that it is byte 5 in either the first or second page, so our program checks both!


== Error Detection and Correction ==
== Error Detection and Correction ==

Revision as of 23:39, 17 October 2007

Introduction

The Reciva Module has a 16Mb * 8 NAND Flash Device, which is configured into 1024 blocks of 16KBytes. Blocks are sub-divided into 32 pages of 512 bytes, each page has an additional 16 bytes which are used for error correction / detection information.

Nand-map.png

Bad Block Management

Each partition starts at the pre-defined offset of 0000000, 0004000 0100000 0E00000 or 0F00000. The NAND Flash comes from the factory with bad blocks marked (the sixth byte in the extra information of the first two of the 32 pages in the 16K block is non-FF). When writing to the partition, the bad blocks are simply skipped.

Note that the kernel source, nandflash and every program I have seen so far, that deals with NAND flash makes the assumption that byte 5 on the first page indicates a bad block. The datasheet for the NAND device says that it is byte 5 in either the first or second page, so our program checks both!

Error Detection and Correction

There are 15 bytes available in the extra information to store error detection / correction data. The processor uses the first three to provide 24 bits of error correction data (18 bits of row, and 6 bits of column data). This is all defined in the Flash Controller section of the S3C2410 data sheet.

Source Code: The nand_ecc.c source code has been extracted from the kernel nand_ecc.c file, which is capable of generating the 24 bit error codes for 256 byte Toshiba memory. The algorithm for the S3C2410 is almost the same (512 bytes instead of 256, and the last two bits of parity data contain actual data rather than being forced to '11').

Booting

The first block in memory is guaranteed to be error free. The boot process simply copies this block to memory, and then begins execution. The bootloader loads the kernel from the second partition, which then loads the root filesystem.

Reading the Flash

Writing to the Flash

Useful Resources